1. Field of the Invention
The present invention relates to plasma reactor apparatus and processes. More specifically, the present invention relates to grounding a semiconductor substrate pedestal of a plasma reactor apparatus during a portion of a positive voltage power bias oscillation cycle to increase the energy of ion particles of the plasma to increase the feature charging effects regarding a substrate being etched using the plasma reactor.
2. State of the Art
Higher performance, lower cost, increased miniaturization of electronic components, and greater density of integrated circuits are ongoing goals of the computer industry. One commonly used technique to increase the density of integrated circuits involves stacking multiple layers of active and passive components one atop another to allow for multilevel electrical interconnection between devices formed on each of these layers. This multilevel electrical interconnection is generally achieved with a plurality of metal-filled vias (“contacts”) extending through dielectric layers that separate the component layers from one another. These vias are generally formed by etching through each dielectric layer using etching methods known in the industry, such as plasma etching. Plasma etching is also used in the forming of a variety of features for the electronic components of integrated circuits. In addition, vertical capacitors may be formed by etching the features of the wall of the capacitor in the capacitor dielectric and forming the remaining capacitor structure around the etched dielectric. Typically, the capacitance of the capacitor is proportional to the surface area of the wall of the capacitor etched in the dielectric material.
In plasma etching, a glow discharge is used to produce reactive species, such as atoms, radicals, and/or ions, from relatively inert gas molecules in a bulk gas, such as a fluorinated gas, such as CF4, CHF3, C2F6, CH2F2, SF6, or other freons, and mixtures thereof, in combination with a carrier gas, such as Ar, He, Ne, Kr, O2, or mixtures thereof. Essentially, a plasma etching process comprises: 1) reactive species are generated in a plasma from the bulk gas, 2) the reactive species diffuse to a surface of a material being etched, 3) the reactive species are absorbed on the surface of the material being etched, 4) a chemical reaction occurs that results in the formation of a volatile byproduct, 5) the byproduct is desorbed from the surface of the material being etched, and 6) the desorbed byproduct diffuses into the bulk gas.
As illustrated in drawing FIG. 4, an apparatus 200 used in the plasma etching process consists of an etching chamber 202 in electrical communication with a first AC (Alternating Current) power source 204. The etching chamber 202 further includes a pedestal 206 to support a semiconductor substrate 208 and an electrode 212 opposing the pedestal 206. The electrode 212 is in electrical communication with a second AC power source 214. The pedestal 206 has an AC power source 216. The electrode 212 and power source 214 may be an inductively coupled plasma source, a microwave plasma source, or any suitable type plasma source.
In the etching chamber 202, a plasma 222 is initiated and maintained by inductively coupling AC energy from the first AC power source 204 into an atmosphere of gases in the etching chamber 202 and the plasma 222 that comprises mobile, positively and negatively charged particles and reactive species. An electric field develops in a sheath layer 224 around the plasma 222, accelerating charged species (not shown) toward the semiconductor substrate 208 by electrostatic coupling.
To assist with the etching, the potential difference between the plasma 222 and the semiconductor substrate 208 can be modulated by applying an oscillating bias power from the pedestal power bias source 216 to the pedestal 206, as illustrated in drawing FIG. 5A (showing the voltage profiles during such oscillation). During the positive voltage phase 232, the substrate collects electron current from electrons that have enough energy to cross the plasma sheath layer 224 (see drawing FIG. 4) having a plasma potential 236 (see drawing FIG. 5A). The difference between the instantaneous plasma potential and the surface potential defines the sheath potential voltage drop 238 (FIG. 5B). Since the plasma potential is more positive than the surface potential, this drop has a polarity that retards electron flow. Hence, only electrons with energy larger than this retarding potential are collected by the substrate. During the negative voltage phase 234, positive ions are collected by the substrate. These ions are accelerated by the sheath voltage drop 238 and strike the substrate.
However, it is known that the plasma etch results, including profile modification, can occur if the features are charged enough to modify the trajectories of the ions and electrons that are injected into these features.
Illustrated in drawing FIG. 6 is the phenomena of electrical charging on a semiconductor device in the process of a plasma etch. A material layer 244 to be etched is shown layered over a semiconductor substrate 242. A patterned photoresist layer 246 is provided on the material layer 244 for the etching of a via. During the plasma etching process, the patterned photoresist layer 246 and material layer 244 are bombarded with positively charged ions 248 and negatively charged electrons 252. This bombardment results in a charge distribution being developed on the patterned photoresist layer 246 and/or the semiconductor substrate 242. This charge distribution is commonly called “feature charging.”
In order for feature charging to occur, the positively charged ions 248 and the negatively charged electrons 252 must become separated from one another. The positively charged ions 248 and negatively charged electrons 252 become separated by virtue of the structures being etched and by the differences in directionality and energy between the positive ions and electrons as they approach the feature being etched. As the structure (in this example, a via 254) is formed by etching, the aspect ratio (height to width ratio) becomes greater and greater. During plasma etching, the positively charged ions 248 are accelerated toward the patterned photoresist layer 246 and the material layer 244 in a relatively perpendicular manner, as illustrated in drawing FIG. 7 by the arrows adjacent positively charged ions 248. The negatively charged electrons 252, however, are less affected by the AC power bias source at the semiconductor substrate 242 and, thus, move in a more random isotropic manner, as depicted in drawing FIG. 8 by the arrows adjacent negatively charged electrons 252. This results in an accumulation of a positive charge at a bottom 256 of via 254 because, on average, positively charged ions 248 are more likely to travel vertically towards the substrate 242 than are negatively charged electrons 252. Thus, any structure with a high enough aspect ratio tends to charge more negatively at photoresist layer 246 and an upper portion of the material layer 244 to a distance A (i.e., illustrated with “−” indicia) and more positively at the via bottom 256 and the sidewalls of the via 254 proximate the via bottom 256 (i.e., illustrated with “+” indicia).
As shown in drawing FIG. 7, the negatively charged sidewalls of the top of the opening deflects the positively charged ions 248 in trajectories towards the sidewalls. In addition, the positively charged via bottom 256 also decreases the vertical component of the ion velocity and therefore increases the relative effect of initial deflection. The deflection results in ion bombardment of the sidewalls 258 proximate the via bottom 256. This can generate a portion of the etched feature with a re-entrant profile, as shown in drawing FIG. 7. Such a profile can be useful in etching a number of films. For example, a re-entrant profile in a metal film can increase alignment tolerance to shorts to adjacent contacts by shrinking the size of the metal line as it meets the layer below it. In addition, a “bulge” can be etched into dielectric films such as borophosphosilicate glass (BPSG) with these ions. In this case, the feature charging causes a pileup of deflected ions at a location in the feature and some widening of the feature occurs.
As shown in drawing FIG. 8, the negatively charged photoresist layer 246 and the upper portion of the material layer 244 deflect the negatively charged electrons 252 away from entering the via 254 or slow the negatively charged electrons 252 as they enter the via 254, both caused by charge repulsion and both of which can change the etch profile. This type of phenomenon is commonly known as “electron shading.”
Thus, it can be appreciated that it would be advantageous to develop an apparatus and a process of utilizing a plasma reactor that maximizes or adds a controllable effect of feature charging while using inexpensive, commercially available semiconductor device fabrication components and without requiring complex processing steps.